The 3D-IC package technology with TSV (through-silicon-via) have been quickly proliferating in diverse fields of applications as a practical more-than-Moore solution of upcoming decades. Mass production has already been started in the form of 2.5D and 3D. With the 5G communication era, 3D packages are expected to be applied more and more and the technical requirements for packages are also expected to improve further. Furthermore, it is believed that there will be many different types of 3D packages which consist of TSV, multiple chip-stacking with fine pitch interconnection, TDV (through-dielectric-via) and so on.
  Definitely, the 3D package process is a comprehensive task requiring innovative changes in all areas including IC design, fabrication processes, integration technology, and characterization. Therefore, close collaboration among industry, universities, and research institutes is crucial to resolve those problems. The organizers of the workshop have invited leading experts from diverse sites to share their expertise and experiences with others who need guidance and advice.

  In the other hand, Fan-Out package is one of most important solutions in terms of small form factor in mobile applications. Even though the workshop has focused on Fan-Out package technology for three years, many technical issues are still remained for high end application.

  This year, the workshop focuses on 3D and Fan-Out package technologies.

  You are cordially invited to the forum of informative lecture and open discussion with world-best leaders in 3D and Fan-Out package technology.
 

Young-Hyun Jun (President, Semiconductor Society, IEIE)
Joong-Hwee Cho (Vice President, Semiconductor Society, IEIE)
Jinsang Kim (Workshop Organizer)
Un-byoung Kang (Workshop Organizer)